|Your chip does not work in a vacuum.|
|Chip in a Jar created by Donald W. Larson, Time Out of Mind and used with written permission.|
Free Model Foundry (FMF) advances the development and free distribution of open source VHDL and Verilog models of electronic components for system and IC design around the world. Our Open Source Model Warehouse promotes widespread sharing of functional and timing simulation models to help solve one of the biggest problems in chip and system design: finding accurate, usable component models.
The availability of these models allows system designers to design and verify new digital electronic products more quickly and at lower cost than the previous methodology of build, test, debug, and build again. The result is faster time to market and more revenue for the systems house. It also means earlier component sales for the IC manufacturers.
Models found on this site are written in a uniform style to make them easy to read. They are at the behavior level of abstraction so they will execute quickly and efficiently. Timing values are external to the models allowing them to represnt multiple technologies and speed grades without being modified or recompiled.
FMF specializes in creating and distributing models for board level design and verification, providing modeling development services to IC vendors, EDA consulting groups, and product design teams.
In addition to providing simulation models of off-the-shelf components and behavioral IP, FMF is a source of consulting services to systems houses for CAE component library architecture and integration. As such we can improve the efficiency of your board design workflow.